Master HDL-based digital design — from logic gates to programmable devices — with India's leading VLSI educator.
Dr. Sohel Rana is a distinguished professor in VLSI Engineering with over 20 years of academic and research experience across leading Indian and international universities. He is a nationally recognised educator currently offering his course on System Design using Verilog on the SWAYAM national platform — reaching thousands of students across India. His teaching philosophy bridges rigorous theory with hands-on digital design practice using industry-standard HDL tools. He has mentored hundreds of students who have gone on to careers at top VLSI companies including Intel, Qualcomm, and Cadence.
Teaching System Design using Verilog on the AICTE-SWAYAM national platform — accessible to students across all Indian universities.
Academic and research experience at prestigious Indian and foreign universities — bringing global VLSI design perspectives to the classroom.
Complete lecture series on Verilog HDL available on YouTube, covering the full course syllabus from introduction to advanced synthesis.
Deep expertise in FPGA-based design, digital synthesis, and sequential circuit optimisation — aligned with current industry practices.
Chapter-wise rich notes, interactive MCQ quizzes, and detailed Q&A — all designed to help students excel in university examinations.
Course content mapped to modern VLSI workflows — covering Verilog, behavioural modelling, FSMs, synthesis, and PLDs/CPLDs.
System Design using Verilog (2AF13/5PC412) is a 2-credit core course for Second Year Electronics Engineering students. It covers HDL-based design of combinational, sequential, and programmable logic systems.
Click 📖 Notes for the full interactive chapter page or 🎯 Quiz for practice MCQs. New chapters will be added progressively.
Enroll in Dr. Sohel Rana's official national-level Verilog course on the AICTE-SWAYAM platform. Free to learn, certificate available.
Watch the introductory lecture of the Verilog course on YouTube — video explanations alongside these chapter notes for best results.
1. M D Ciletti – Advanced Digital Design with Verilog HDL
2. Palnitkar – Verilog HDL, 2nd Ed, Pearson
3. Zvonko Vranesic – Fundamentals of Digital Logic with Verilog
EDA Playground – browser-based Verilog simulator (edaplayground.com)
Icarus Verilog + GTKWave – free open-source simulation suite
Reach out to Dr. Sohel Rana for academic queries, project guidance, or to know more about the VLSI programme.